Display device and manufacturing method thereof

ABSTRACT

It is an object of the present invention to prevent an influence of voltage drop due to wiring resistance, trouble in writing of a signal into a pixel, and trouble in gray scales, and provide a display device with higher definition, represented by an EL display device and a liquid crystal display device. In the present invention, a wiring including Cu is provided as an electrode or a wiring used for the display device represented by the EL display device and the liquid crystal display device. Besides, sputtering is performed with a mask to form the wiring including Cu. With such structure, it is possible to reduce the voltage drop and a deadened signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device that has asemiconductor element (specifically, a thin film transistor), and alsorelates to display devices such as an EL display device (a lightemitting device) provided with a light emitting element and a liquidcrystal display device and a manufacturing method there of, especially,to a large-sized display device and a manufacturing method thereof.

2. Description of the Related Art

These days, it has been proceeded to make a screen have a large size anda high definition in active matrix semiconductor devices such as an ELdisplay device and a liquid crystal display device, and the number ofwirings such as signal lines and scan lines tends to increase as well asa length of the wiring. Therefore, it is required to prevent voltagedrop due to wiring resistance, trouble in writing of a signal into apixel, and trouble in gray scales.

In the EL display device, a driving method for displaying an image withmultiple gray scales has a voltage input system of inputting voltagefrom a signal line and a current input system of inputting current froma signal line, and further, the voltage input system has a currentwriting system of writing data in current format (driving current) intoa light emitting element for controlling luminance and a voltage writingsystem of writing data in voltage format into a light emitting elementfor controlling luminance while the current input system has the currentwriting system. Such driving method especially has trouble caused due towiring resistance. The wiring resistance causes delay in transmission ofa signal to a terminal of a signal line, and the voltage drop of a powersource line (specifically, a current supply line) makes it difficult tosupply predetermined current or voltage. Then, fluctuation in displayingis caused as the result since luminance of light emitted from the lightemitting element is proportional to a value of the current or voltagesupplied through the signal line. Further, due to the voltage drop, theEL display device and the liquid crystal display device have trouble ofwaveform distortion of a pulse signal input through the wiring.

In the case of using copper as a material with low resistance forforming a wiring, there is a means of forming a plugged wiring (astructure formed with damascene). In the damascene, however, aninsulating film is provided at the position of a wiring to be formed, agroove for forming the wiring is formed in the insulating film, and thena Cu wiring is formed in the groove (for example, Japanese PatentLaid-Open 2000-58650).

Therefore, in conventional display devices, beaten-copper with lowresistance is used for a PWB-side wiring of a printed-wiring board (PWB)in electrically connecting the PWB-side wiring to an element-side wiringwith an isotropic conductive film instead of a wiring to suppressvoltage drop of the element-side wiring and signal delay (for example,Japanese Patent Laid-Open 2001-236025).

SUMMARY OF THE INVENTION

It is an object of the present invention to prevent the above-mentionedinfluence of the voltage drop due to the wiring resistance, the troublein writing of driving current into a pixel, and the trouble in grayscales and to provide semiconductor devices with higher definition,represented by an EL display device and a liquid crystal display device.In addition, it is also an object of the present invention to form awiring with wiring resistance reduced in accordance with fewer processesand provide a semiconductor device that has the wiring with lowresistance.

In order to achieve the above objects, a wiring including Cu is formedin the present invention as a wiring or an electrode used for displaydevices represented by an EL display device and a liquid crystal displaydevice. It is noted that the wiring including Cu includes a wiring inwhich a wiring containing Cu as its main component (Hereinafter, a Cuwiring) is laminated on a wiring or an electrode with a single-layerstructure. Also, it is noted that the wiring including Cu includes awiring in which a Cu wiring is laminated on a wiring or an electrodewith a laminate structure, and includes a structure in which one oflayers of a wiring or an electrode with the laminate structure is a Cuwiring. Specifically, a signal line, a scan line, a current supply line,a power source line, a source electrode, a drain electrode, and a gateelectrode are included in the wiring or the electrode.

A conductive film named functionally is the wiring or the electrode, forexample, assuming a gate electrode, a source electrode, and a drainelectrode of a thin film transistor (Hereinafter TFT), a signal line, ascan line, a current supply line, or the like. Since the wiring and theelectrode can be obtained when a conductive film is subjected topatterning into a predetermined shape, the wiring and the electrode alsocollectively mean a conductive film. It is noted that the electrode isnot clearly distinguished from the wiring since a portion of the signalline, the scan line, or the current supply line is an electrode.

Such a wiring material Cu diffuses into a semiconductor film and aninterlayer insulating film and has a harmful influence on electriccharacteristics of a TFT. In the present invention, therefore, a barrierfilm (a barrier layer) is provided at least between an active layer andthe Cu wiring in order to prevent penetration of Cu into the activelayer (a semiconductor film subjected to patterning into anisland-shape) of a TFT.

Such barrier film is formed of a conductive film containing nitrogen orcarbon (a conductive barrier film), and one kind or plural kinds ofmaterials selected from tantalum nitride (TaN), titanium nitride (TiN),tungsten nitride (WN), tantalum carbide (TaC), and titanium carbide(TiC) may be used. In addition, a ternary-system amorphous barrier filmcontaining Si may be used for the conductive barrier film. Theconductive barrier film may be one of layers of the wiring or theelectrode.

More preferably, a barrier film formed of an insulating film (aninsulating barrier film) containing nitrogen is formed for covering theCu wiring. One kind or plural kinds of materials selected from siliconnitride (SiN), silicon oxynitride (SiNO), and aluminum nitride (AlN orAl_(x)N_(y)), for example, may be used to form the insulating barrierfilm containing nitrogen.

Further, the Cu wiring of the present invention is formed withsputtering. It is preferable to form at least the conductive barrierfilm, the Cu wiring, and the insulating barrier film sequentially filmwith sputtering.

FIGS. 11A to 11D show examples of specific structures of the wiring orthe electrode of the present invention, and an explanation will be givenwith FIGS. 11A to 11D on a structure in which a Cu wiring formed on aconductive barrier film is covered with an insulating barrier film.

A wiring shown in FIG. 11A has a structure in which a conductive filmcontaining Ti, a conductive barrier film containing TiN, and Cu wiringare laminated in order from a substrate side, and an insulating barrierfilm containing SiN is provided for covering the Cu wiring. Hereinafter,the laminate structure is denoted as Ti/TiN/Cu/SiN from the substrateside. In the case of FIG. 11A, patterning is performed to the conductivefilm containing Ti and the conductive barrier film containing TiN at thesame time, the Cu wiring is formed, and the insulating barrier filmcontaining SiN is formed. Accordingly, a width of the conductive filmcontaining Ti is the same as that of the conductive barrier filmcontaining TiN, and a width of the Cu wiring is shorter than that of theconductive film containing Ti and the conductive barrier film containingTiN. It is noted that the width means a length in a channel lengthdirection.

A wiring shown in FIG. 11B has a structure in which a conductive barrierfilm containing TiN and an insulating barrier film containing SiN areprovided and conductive films of the wiring are laminated. The laminatestructure is denoted as Ti/Al/TiN/Cu/SiN from the substrate side. In thecase of FIG. 11B, patterning is performed to the conductive filmcontaining Ti, the conductive film containing Al, and the conductivebarrier film containing TiN at the same time, the Cu wiring is formed,and the insulating barrier film containing SiN is formed. Accordingly,the conductive film containing Ti, the conductive film containing Al,and the conductive barrier film containing TiN have the same width, anda width of the Cu wiring is shorter than that of the conductive filmcontaining Ti, the conductive film containing Al, and the conductivebarrier film containing TiN.

A wiring shown in FIG. 11C has a structure in which a conductive barrierfilm containing TaN and an insulating barrier film containing SiN areprovided, and the laminate structure is denoted as Ti/TaN/Cu/SiN fromthe substrate side. In the case of FIG. 11C, patterning is performed tothe conductive film containing Ti and the conductive barrier filmcontaining TaN at the same time, the Cu wiring is formed, and theinsulating barrier film containing SiN is formed. Accordingly, a widthof the conductive film containing Ti is the same as that of theconductive barrier film containing TaN, and a width of the Cu wiring isshorter than that of the conductive film containing Ti and theconductive barrier film containing TaN.

A wiring shown in FIG. 11D has a structure in which a conductive barrierfilm containing WN and an insulating barrier film containing SiNO areprovided, and the laminate structure is denoted as Ti/WN/Cu/SiNO fromthe substrate side. In the case of FIG. 11D, patterning is performed tothe conductive film containing Ti and the conductive barrier filmcontaining WN at the same time, the Cu wiring is formed, and theinsulating barrier film containing SiNO is formed. Accordingly, a widthof the conductive film containing Ti is the same as that of theconductive barrier film containing WN, and a width of the Cu wiring isshorter than that of the conductive film containing Ti and theconductive barrier film containing WN.

In short, the wiring of the present invention is formed in order thatthe conductive film and the conductive burrier film have the same widthand the width of the Cu wiring is shorter than that of the conductivefilm and the conductive barrier film. The width of the conductive filmand the conductive barrier film is on the order of 30 to 40 μm in apixel portion, and it is preferable that the Cu wiring has a width onthe order of 5 to 20 μm and a height on the order of 0.1 to 1 μm.

The wiring including Cu may be used as a source electrode and a drainelectrode of a TFT. In this case, a similar structure to the structuresof the wirings shown in FIGS. 11A to 11D may be used. Particularly, itis preferred that the wiring including Cu is used for a source electrodeand a drain electrode of a TFT for supplying large current (for example,a buffer TFT of a driving circuit portion).

The wiring including Cu may also be used as a gate electrode. In thiscase, the Cu wiring may be formed on the conductive barrier film tobecome a part of the gate electrode. It is noted that a scan line formedat the same time as the gate electrode may also be of the wiringincluding Cu and the Cu wiring may be formed on the conductive barrierfilm.

Namely, the wiring including Cu of the present invention is applicableto any of wirings and electrodes such as a signal line, a scan line, acurrent supply line, a source electrode, a drain electrode, and a gateelectrode. Since Cu has low resistance and makes it possible to flowlarge current, it is possible to reduce voltage drop and a deadenedsignal waveform when the wiring including Cu is used for the wirings andelectrodes. In addition, a display device that has a Cu wiring with lowresistance can have an area of a wiring and an electrode reduced, and itis possible to achieve a narrowed frame. Further, it is necessary toflow large current into a wiring in a middle-sized and a large sized (5inch or more) EL display devices and liquid crystal display devices, andtherefore the present invention is useful.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIGS. 1A and 1B are diagrams that show a pixel of a display deviceaccording to the present invention;

FIGS. 2A to 2C are diagrams that show sectional views of a pixel of adisplay device according to the present invention;

FIGS. 3A to 3D are diagrams that show sectional views of the pixel ofthe display device according to the present invention;

FIGS. 4A to 4C are diagrams that show sectional views of the pixel ofthe display device according to the present invention;

FIGS. 5A to 5C are diagrams that show a display device according to thepresent invention and a sectional view thereof;

FIGS. 6A to 6C are diagrams that show a display device according to thepresent invention and a sectional view thereof;

FIGS. 7A to 7C are diagrams that show a display device according to thepresent invention;

FIG. 8 is a diagram that shows a deposition system for forming a wiringaccording to the present invention;

FIG. 9 is a diagram that shows a mask for forming a wiring according tothe present invention;

FIG. 10 is a diagram that shows a deposition system for forming a wiringaccording to the present invention;

FIGS. 11A to 11D are diagrams that show wirings according to the presentinvention;

FIGS. 12A to 12C are diagrams that show electronic devices that use adisplay device according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiment modes of the present invention will be described below withdrawings. In the description below, a transistor has three terminals ofa gate electrode, a source electrode, and a drain electrode. However, itis difficult to clearly distinguish between the source electrode and thedrain electrode considering a structure of the transistor. In describinga connection between elements, therefore, one of the source electrodeand the drain electrode is denoted as a first electrode, and the otheris denoted as a second electrode.

Embodiment Mode 1

In the present embodiment mode, the case of applying a wiring includingCu to a signal line and a current supply line will be described withreference to FIGS. 1A to 4C.

FIG. 1A shows an equivalent circuit of a pixel of an EL display device.As shown in FIG. 1A, the pixel has at least a signal line 101, a currentsupply line 102, a scan line 103, plural TFTs 104 and 105, a capacitor106, and a light emitting element 107. The TFTs 104 and 105 may have amulti-gate structure such as a double-gate structure or a triple-gatestructure instead of a single-gate structure. It is unnecessary toprovide the capacitor 106 in the case of having large gate capacities ofthe TFTs 104 and 105 and leakage current within the allowable range.

Here, it is the signal line 101, the current supply line 102, and thescan line 103 that have trouble due to wiring resistance. It isnecessary to consider voltage drop due to the wiring resistance in thesignal line 101 and the current supply line 102 particularly as adisplay device has a larger size. In the present embodiment mode, awiring including Cu is used as at least the signal line 101 and thecurrent supply line 102.

FIG. 1B shows a top view of FIG. 1A with a pixel electrode (a firstelectrode of the light emitting element) 107′ formed, a Cu wiring 108 islaminated on the signal line 101 and the current supply line 102. TheTFT 104 has a first electrode connected to the signal line 101 and asecond electrode connected to the capacitor 106 and a gate electrode ofthe TFT 105, and a portion of the scan line 103 is a gate electrode ofthe TFT 104. The TFT 105 has a first electrode connected to the pixelelectrode 107′ and a second electrode connected to the current supplyline 102. The capacitor 106 is formed in a region in which the currentsupply line 102 and a semiconductor film are laminated.

Next, an explanation will be given with FIG. 2A on a structure of asectional view along A-A′ shown in FIG. 1B. FIG. 2A shows a substrate111 with an insulating surface, and it is possible to use any of a glasssubstrate, a ceramic substrate, a quartz substrate, a silicon substrate,and a plastic substrate (including a plastic film) as the substrate 111.On the substrate 111, a silicon oxynitride film 112 a and a siliconoxynitride film 112 b are laminated as a base film. Of course, it is notnecessary to limit a material of the base film to silicon oxynitride.Further, a semiconductor film 113 for an active layer of the TFT 105 andfor the capacitor 106 is provided on the silicon oxynitride film 112 b.

The semiconductor film 103 of the TFT 105 is covered with a gateinsulating film 114, and a gate electrode of a laminate of tantalumnitride (TaN) 115 and tungsten (W) 116 is provided thereon. Although asilicon oxynitride film is used as the gate insulating film 114 in thepresent embodiment mode, it is useful in terms of improving anintegration level to use a nitrided insulating film with a high relativedielectric constant such as an aluminum nitride film since an elementspace required can be reduced. Although the metal films of the gateelectrode have large selection ratios each other, such structure becomespossible when etching conditions are optimized. With respect to theetching conditions, it may be possible to refer to Japanese PatentLaid-Open 2001-313397 by the present applicant. The gate electrode orresist is used as a mask to form a source region, a drain region, and achannel forming region in the semiconductor film 113. In addition, anLDD region and a GOLD region overlapped with the gate electrode mayappropriately be formed. It is noted that the source region, the drainregion, the LDD region, or the GOLD region, into which an impurity isdoped, is denoted as an impurity region. Further, a heating furnace orlaser is used to activate the impurity region.

Besides, a silicon nitride film or silicon oxynitride film is providedas an insulating film 117 covering the gate electrode. In the presentembodiment mode, a silicon oxynitride film is formed with plasma CVD. Inaddition, for planarization, a photosensitive or non-photosensitiveorganic material (polyimide, acrylic, polyamide, polyimideamide, resist,or benzocyclobutene), an inorganic material (such as silicon oxide,silicon nitride, or silicon oxynitride) formed with sputtering, CVD, orcoating, or a laminate thereof is used to form a first insulating film118 as an interlayer insulating film on the insulating film 117.

On the first insulating film 118, a first passivation film 119 includinga nitrided insulating film (typically, a silicon nitride film or asilicon oxynitride film) is formed. In the present embodiment mode, asilicon nitride film is used for the first passivation film 119. Afterthat, a contact (an opening portion) in the first passivation film 119,the first insulating film 118, the insulating film 117, and the gateinsulating film 114 with wet etching or dry etching.

It is noted that the contact shown in FIG. 2A and provided in theinterlayer insulating film has a tapered shape in which a diameterbecomes smaller toward the bottom and an angle made by a top surface ofthe interlayer insulating film and a slope of the contact (a cornerportion of the contact) is on the order of 95 to 135 degree. In thecontact, a drain electrode or a source electrode (Hereinafter, anelectrode collectively) 120 is formed to be connected a source region ora drain region. At this time, patterning of the same layer is performedto form the signal line 101 and the current supply line 102 at the sametime. In the present embodiment mode, the electrode, the signal line,and the current supply line are formed of a laminate film of Ti/Al/TiN,and the conductive film including TiN functions as a conductive barrierfilm.

Then, DC sputtering with a mask is employed to form the Cu wiring 108 onthe signal line 101 and the current supply line 102. Note that it ispossible to refer to Embodiment Mode 4 on detailed forming processes.

As mentioned above, the Cu wiring is formed on the signal line and thecurrent supply line to obtain the wring including Cu as the signal lineand the current supply line.

FIG. 2B shows a different structure from that of FIG. 2A in which thecorner portion of the contact has the tapered shape with the angle. InFIG. 2B, a contact has a corner portion rounded and a diameter thatbecomes smaller toward the bottom. As a material of an interlayerinsulating film in this case, a photosensitive or non-photosensitiveorganic material (polyimide, acrylic, polyamide, polyimideamide, resist,or benzocyclobutene) may be used. Then, wet etching or dry etching maybe performed after exposure to form the structure with the contact. Inthe case of using the photosensitive organic material, however, exposureis carrier out to form the contact without etching. After providing thecontact in the interlayer insulating film, the first passivation film119 is formed.

Further, FIG. 2C has a contact with another different tapered shape, andthe contact has a corner portion rounded and a slope with two or moredifferent curvature radiuses. As a material of an interlayer insulatingfilm in this case, a photosensitive or non-photosensitive organicmaterial (polyimide, acrylic, polyamide, polyimideamide, resist, orbenzocyclobutene) may be used. Then, wet etching or dry etching may beperformed after exposure to form the structure with the contact. In thecase of using the photosensitive organic material, however, exposure iscarried out to form the contact without etching. After providing thecontact in the interlayer insulating film, the first passivation film119 is formed.

The shape of the contact in the interlayer insulating film, shown ineach of FIGS. 2A to 2C, makes it possible to prevent breaking of thewiring 102 of the capacitor 106 and the wiring 120 provided for the TFT105.

Then, an insulating barrier film 204 for covering the Cu wiring 108 ispreferably formed as shown in FIG. 3A. In order to form the insulatingbarrier film 204, a material such as silicon nitride (SiN) or siliconoxynitride (SiNO) may be used. In the present embodiment mode, a filmcontaining silicon nitride is formed with high frequency sputtering.Note that it is possible to refer to Embodiment Mode 4 on detailedforming processes. Since the Cu wiring is covered with the insulatingbarrier film 204, the risk of diffusion of Cu into the semiconductorfilm is further reduced.

Then, a photomask is used to form an opening portion in the insulatingbarrier film 204, and the pixel electrode 107′ is formed to cover theopening portion. The pixel electrode 107′ is connected to the wiring 120through the opening portion.

It is noted that structures shown in FIG. 3B and FIG. 3C are differentfrom that of FIG. 3A in a forming order of the wiring 120, theinsulating barrier film 204 and the pixel electrode 107′ or a formingprocess of the opening portion in the insulating barrier film 204.

The structure shown in FIG. 3B is different from that of FIG. 3A in theforming order. In the case of forming the structure of FIG. 3B, thewiring 120, the signal line 101, and the current supply line 102 areformed after providing the pixel electrode 107′, the Cu wiring 108 isformed on the signal line 101 and the current supply line 102, theinsulating barrier film 204 is formed next, and then the opening portionis provided in the insulating barrier film 204 lastly.

In the ease of forming the structure of FIG. 3C, along with the case offorming the structure of FIG. 3A, the wiring 120, the signal line 101,and the current supply line 102 are formed, the Cu wiring 108 is formedon the signal line 101 and on the current supply line 102, and theinsulating barrier film 204 is formed. After that, differently from thecase of FIG. 3A, an insulating film 118′ as a second interlayerinsulating film is formed and a second passivation film 119′ is formedon the insulating film 118′. Then, an opening portion is provided in theinsulating film 118′ and the second passivation film 119′, the pixelelectrode 107′ is provided in the opening portion to be connected to thewiring 120. It is noted that the insulating film 118′ may be formed ofthe same material with the same means as the first insulating film 118and the second passivation film 119′ may be formed of the same materialwith the same means as the first passivation film 119.

Further, a structure shown in FIG. 3D is different from those of FIGS.3A to 3C since a manufacturing method of the insulating barrier film 204in FIG. 3A is different from that of the insulating barrier film 204 inFIGS. 3A to 3C. In the case of forming the structure shown in FIG. 3D,the insulating barrier film 204 is formed with a mask to cover at leastthe Cu wiring 108 after forming the Cu wiring 108. Accordingly, it isunnecessary to provide the opening portion in the insulating barrierfilm 204 with the photomask.

In the case of the structure of FIG. 3D, a conductive barrier film maybe used instead of the insulating barrier film 204. This is becauseinsulation between the pixel electrode and the conductive barrier filmis ensured with a second insulating film later formed. Since theconductive barrier film has smaller capacitance compared to theinsulating barrier film, the Cu wiring covered with the conductivebarrier film entirely is suitable for a high-speed operation.

It is noted that it is possible to apply the above-mentioned structureof the insulating barrier film 204 shown in FIG. 3D and themanufacturing method thereof to the cases of FIGS. 3A to 3C, and itbecomes possible to use a conductive barrier film instead of theinsulating barrier film 204.

Next, an explanation will be given with reference to FIGS. 4A to 4C onprocesses of providing a second insulating film that functions as a bank(also called a partition, or a barrier), forming an opening portion inthe second insulating film on the pixel electrode, and providing a lightemitting layer and the second electrode in the pixel electrode.

In FIG. 4A, a second insulating film 205 is formed at both ends of thepixel electrode 107′ of the structure shown in FIG. 3A. A photosensitiveor non-photosensitive organic material (polyimide, acrylic, polyamide,polyimideamide, resist, or benzocyclobutene), an inorganic material(such as silicon oxide, silicon nitride, or silicon oxynitride) formedwith sputtering, CVD, or coating, or a laminate thereof is used to formthe second insulating film 205. In the ease of a photosensitive organicmaterial for the second insulating film 205, one of two kinds ofphotosensitive organic materials classified roughly, a negativephotosensitive organic material that becomes insoluble in an etchantwith light or a positive photosensitive organic material that becomessoluble in an etchant with light, is appropriately used, an openingportion is formed on the pixel electrode 107′, and the second insulatingfilm 205 is formed at both ends of the pixel electrode 107′.

After that, a light emitting layer 206 including an organic compound isformed in the opening portion, and a second electrode 207 is formed onthe light emitting layer 206. It is preferable to perform heating undervacuum for degassing before or after forming the light emitting layer206 including the organic compound. Also, it is preferable that asurface of the first electrode is planarized since the light emittinglayer 206 including the organic compound is extremely thin, and forexample, planarization may be performed with treatment of chemicalmechanical polishing (typically, CMP) before or after patterning of thefirst electrode. In addition, cleaning (brush cleaning or bellcleancleaning) for cleaning foreign particles (such as dusts) may beperformed in order to improve cleanness of the surface of the pixelelectrode.

It is noted that the opening portion (contact) of the second insulatingfilm 205, shown in FIG. 4A, has a tapered shape in which a diameterbecome smaller toward the bottom and an angle made by a top surface ofthe second insulating film 205 and a slope of the contact (a cornerportion of the contact) is on the order of 95 to 135 degree.

A structure shown in FIG. 4B is different from that in FIG. 4A in whichthe corner portion of the contact has the tapered shape with the degree.In FIG. 4B, a contact has a corner portion rounded and a diameter thatbecomes smaller toward the bottom. As a material of the secondinsulating film 205, a photosensitive or non-photosensitive organicmaterial (polyimide, acrylic, polyamide, polyimideamide, resist, orbenzocyclobutene) may be used. Then, wet etching or dry etching may beemployed after exposure to form the contact. In the case of using thephotosensitive organic material, however, exposure is performed to formthe contact without etching.

Further, another different tapered shape of a contact is shown in FIG.4C. The contact has a corner portion rounded and a slope with at leasttwo different curvature radiuses R1 and R2. As a material of the secondinsulating film 205, a photosensitive or non-photosensitive organicmaterial (polyimide, acrylic, polyimide, polyimideamide, resist, orbenzocyclobutene) may be used. Then, wet etching or dry etching may beemployed after exposure to form the contact. In the case of using thephotosensitive organic material, however, exposure is performed to formthe contact without etching.

Although FIGS. 4A to 4C is described based on the structure shown inFIG. 3A, it is possible to combine any of the structures shown in FIGS.3B to 3D, and further FIGS. 2B and 2C.

Although the case of the display device that has the light emittingelement is described in the present embodiment mode, it is needless tosay that the wiring including Cu may be used as a signal line, anelectrode, and other wiring in a display device that has a liquidcrystal element.

As mentioned above, in the present embodiment mode, the wiring includingCu is used as the wiring represented by the signal line or currentsupply line, specifically, the wiring structure in which the Cu wiringis provided on the wiring is used. Accordingly, the Cu wiring isallocable to structures and manufacturing processes of all TFTs, pixelelectrodes, and wirings.

Further, when the wiring including Cu is used in the present embodimentmode, it becomes possible to reduce voltage drop and around of a signalwaveform. Additionally, it is possible to reduce an area of the wiringand the electrode and to achieve a narrowed frame in the display devicethat has the wiring including Cu with low resistance.

Embodiment Mode 2

In the present embodiment mode, an example in which a wiring includingCu is applied to a gate electrode will be described with reference toFIG. 5A to 5C.

FIG. 5A shows an equivalent circuit of a pixel in an EL display device.As shown in FIG. 5A, the pixel has at least a signal line 601, a currentsupply line 602, a scan line 603, plural TFTs 604 and 605, a capacitor606, and a light emitting element 607. It is noted that the TFTs 604 and605 may have a multi-gate structure such as a double-gate structure or atriple-gate structure instead of a single-gate structure.

Further, FIG. 5B shows a top view of FIG. 5A in which a pixel electrode(a first electrode of the light emitting element) 607′ is formed, andhas the signal line 601, the current supply line 602, the scan line 603,TFTs 604 and 605, the capacitor 606, and the pixel electrode 607′ of thelight emitting element. A Cu wiring 608 is provided on the can line 603and a gate electrode of the TFT 604, that is on the wiring formed of thesame layer as the gate electrode.

FIG. 5C shows a sectional view along B-B′ in FIG. 5B. Similarly to FIG.2C, a substrate with an insulating surface 611, a silicon oxynitridefilm 612 a and a silicon oxynitride film 612 b as a base film, asemiconductor film 613 of the TFTs 604 and 605 are provided. Then, agate insulating film 614 is provided to cover the semiconductor film613, and a conductive barrier film 615 and the Cu wiring 608 are formedover the semiconductor film 613. Namely, the present embodiment mode ischaracterized in that the wiring including Cu is used as the gateelectrode. It is be possible to refer to Embodiment Mode 4 on formingprocesses of the wiring including Cu. The conductive barrier film 615 isformed using one selected from tantalum nitride (TaN), titanium nitride(TiN), and tungsten nitride (WN) or a laminate film of pluralitythereof, and has a function as a protective film for preventingpenetration of Cu due to diffusion into the semiconductor film 613. Thesame layer as the gate electrode is subjected to patterning to form thescan line 603 at the same time in addition to the gate electrode. Thatis, the scan line 603 has a laminate structure of the conductive barrierfilm and the Cu wiring.

Then, a source region, a drain region, and a channel forming region areformed in the semiconductor film 613 with gate electrode or resist as amask. Additionally, an LDD region and a GOLD region overlapped with thegate electrode may appropriately be formed. It is noted that the sourceregion, the drain region, the LDD region, or the GOLD region, intowhich, an impurity is doped, is denoted as an impurity region. As aninsulating film 617 covering the gate electrode, a silicon nitride filmor a silicon oxynitride film is provided. The insulating film 617functions as an insulating barrier film.

In order to activate the impurity regions, heating furnace or laser isused. At this time, it is preferable to irradiate laser (for example,excimer laser) from a back surface (a backside of the side with thesemiconductor film formed) of the substrate for the activation in orderto prevent Cu from diffusing to penetrate into the semiconductor filmdue to heating in the activation. More preferably, the impurity regionsare formed after forming the conductive barrier film 615, the heatingfurnace or laser is used to activate the impurity regions, and then theCu wiring 608 is formed.

In addition, for planarization, a photosensitive or non-photosensitiveorganic material (polyimide, acrylic, polyamide, polyimideamide, resist,or benzocyclobutene), an inorganic material (such as silicon oxide,silicon nitride, or silicon oxynitride) formed with sputtering, CVD, orcoating, or a laminate thereof is used to form an interlayer insulatingfilm 618 on the insulating film 617.

On the interlayer insulating film 618, a first passivation film 619including a nitrided insulating film (typically, a silicon nitride filmor a silicon oxynitride film) is formed. In the present embodiment mode,a silicon nitride film is use for the barrier insulating film 619. Then,wet etching or dry etching is used to form a contact (an openingportion) in the first passivation film 619, the interlayer insulatingfilm 618, the insulating film 617, and the gate insulating film 614. Asa shape of the contact, that is, a shape of the interlayer insulatingfilm, any structure of FIGS. 2A to 2C may be applied.

In the contact, a drain wiring or a source wiring is formed andconnected to the source region or the drain region, and patterning ofthe same layer as the wiring forms the signal line 601 and the currentsupply line 602 at the same time. After that, a light emitting layer andthe like are formed as shown in FIGS. 3A to 3D and FIGS. 4A to 4C. It isnoted that any structure of FIGS. 3A to 3D may be employed for a pixelelectrode to be formed and any of FIGS. 4A to 4C may be used as astructure of an insulating film and the like for forming the lightemitting layer.

In this way, it is possible to apply the wiring including Cu to the gateelectrode. It is also possible to use the wiring including Cu as thesignal line and the current supply line in addition to the gateelectrode.

When the wiring including copper is applied to the gate electrode andthe scan line as set fourth above, it is possible to reduce voltage dropand a deadened waveform and further to achieve a narrowed frame of thedisplay device.

Embodiment Mode 3

In the present embodiment mode, an explanation will be given with FIGS.6A to 6C on a whole configuration of an EL (electroluminescence) displaydevice to which the Cu wiring is applicable. FIG. 6A shows a top view ofthe EL display device in which an element substrate that has a TFTformed is sealed with a sealing material, FIG. 6B shows a sectional viewalong B-B′ of FIG. 6A, and FIG. 6C shows a sectional view along A-A′ ofFIG. 6A.

On a substrate 301, a pixel portion (display portion) 302 is arrangedand a signal line driving circuit (source line driving circuit) 303, ascan line driving circuit (gate line driving circuit) 304 a and 304 b,and a protective circuit 305 are also arranged to surround the pixelportion 302. A sealant 306 is provided to surround the driving circuits.In addition, a Cu wiring 300 is provided over taken-around wirings froma signal line, a current supply line, and the signal line drivingcircuit to an input terminal pf FPC (flexible printed circuit). It ispossible to refer to Embodiment Modes 1 and 2 on a structure of thepixel portion 302, particularly, on a structure of a wiring thereof. Asa sealing material 307, glass, metal (typically, stainless), ceramics,or plastic (including a plastic film) can be used, and it is alsopossible to perform sealing only with an insulating film.

Additionally, it is necessary to use a translucent material for thesealing material 307 in accordance with an emission direction of lightfrom a light emitting element. For example, light is emitted to asubstrate side in the case of using a transparent electrode (ITO, forexample) as the pixel electrode 107′ shown in FIGS. 4A to 4C while lightis emitted to the opposite side to the substrate side in the case ofusing a transparent electrode (ITO, for example) as the second electrode207.

The sealant 306 may be provided to overlap with a portion of the signalline driving circuit 303, the scan line driving circuit 304 a and 304 b,and the protective circuit 305. The sealant 306 is used to provide thesealing material 307, and the substrate 301, the sealant 306, and thesealing material 307 are formed to form an enclosed space 308. Thesealing material 307 has a desiccant 309 (such as barium oxide orcalcium oxide) provided in a concave portion thereof, which has afunction of adsorbing moisture and oxygen to keep clean inside theenclosed space 308 and suppress degradation of a light emitting layer.The convex portion is covered with a meshed cover material 310, and airand moisture can pass through the cover material 310 while no desiccant309 can go through the cover material 310. It is noted that the enclosedspace 308 may be filled with rare gas such as argon, and filling withinactive resin or liquid is also possible.

In the present embodiment mode, the protective circuit 305 is providedbetween an input terminal portion 311 and the signal line drivingcircuit 303 to let static electricity such as a sudden pulse signaltherebetween go outside. On this occasion, the instantaneous signal withhigh voltage is deadened first, and the circuit including asemiconductor film can let the deadened high voltage go outside. Theprotective circuit, of course, may be provided at the other position,for example, between the pixel portion 302 and the signal line drivingcircuit 303 or between the pixel portion 302 and the scan line drivingcircuit 304 a or 304 b.

Further, the input terminal portion 311 for transmitting a signal to thesignal line driving circuit 303 and the scan line driving circuit 304 aand 304 b is provided on the substrate 301, and a data signal such as avideo signal is transmitted to the input terminal portion 311 throughFPC 312. The FPC is also connected to a taken-around wiring from asecond electrode of a light emitting element and a taken-around wiringform a scan line which are not shown in the figures.

FIG. 6B shows a section of the input terminal portion 311, and an inputwiring is electrically connected to a wiring 315 provided at the FPC 312side with resin 317 with a conductor 316 dispersed therein. The inputwiring has a structure in which conductive oxide film 314 is laminatedin a wiring 313 formed at the same time as the scan line (gate wiring)or the signal line (source wiring). For the conductor 316, a sphericalpolymer may be subjected to gold coating or silver coating.

FIG. 7A shows an enlarged view of the input terminal portion 311 (inparticular, a portion 320 shown in FIG. 6A), specifically, shows a topview of a first wiring 701 (to be a taken-around wiring for a connectionwith FPC) formed at the same time as the signal line and the currentsupply line, a Cu wiring 702 provided on the first wiring 701, a contact703 provided in a first insulating film 707, and a transparent electrode(an ITO film, for example) 704. It is noted that the first wiring 701includes a conductive barrier film.

FIG. 7B shows a sectional view along A-A′ in FIG. 7A. First, on a secondwiring 706 formed at the same time as the gate wiring, the firstinsulating film 707 formed at the same time as an interlayer insulatingfilm is provided. After that, the first wiring 701 as the taken-aroundwiring is formed in the contact (opening portion) 703 formed in a firstinsulating film 707, and is connected to the second wiring 706 throughthe contact. On the first wiring 701, the Cu wiring 702 subjected topatterning is formed to extend in front of the contact 703. Thetransparent electrode 704 is formed to extend from a position on thefirst insulating film 707, and may be formed to have contact with thefirst wring 701. Next, a second insulating film 711 is formed over thefirst insulating film to cover the first wiring 701 and the Cu wiring702, and an opening portion is formed in the second insulating film 711to cover a periphery (called also an edge or a frame) of the transparentelectrode 704 and make the surface thereof exposed (the top view of theFIG. 7A). It is noted that a margin “d” between the first and secondinsulating films 707 and 711 is set to several μm, for example, 3 μm.

Here, FIG. 7C shows an enlarged view of a protective circuit 720 and itsvicinity. In the vicinity of a connecting region to the FPC(hereinafter, a connecting region), a semiconductor film 712 includingsilicon formed at the same time as an active layer of the TFT has arectangle provided stepwise (zigzag). Then, the semiconductor film 712is connected to the first and second wirings 701 and 706 through acontact to function as the protective circuit. With such protectivecircuit provided, the semiconductor layer functions as a resistor to beable to prevent excessive current due to static electricity and the likefrom flowing to the driving circuit portion and the pixel portion.

Besides, a TFT or a thin film diode may be provided instead of thesemiconductor film. For example, a TFT or a thin film diode, provided toconnect to a signal line (signal input line) to which a start pulse or aclock pulse input to the signal line driving circuit or the scan linedriving circuit is input, may be used as a protective circuit. Ofcourse, a plurality of semiconductor films, TFTs, or thin film diodesmay be provided.

Further, the connection between a terminal of the FPC and thetaken-around wiring is different in the case of connecting thetaken-around wiring to the electrode of the light emitting element fromthe case of connecting the taken-around wiring to the wiring of thedriving circuit portion. That is, in the case of connecting thetaken-around wiring to the electrode of the light emitting element, awider width of the taken-around wiring is designed and two FPC terminalsare connected with respect to the taken-around wiring since it isdesired to lower resistance as much as possible. On the other hand, inthe case of connecting the taken-around wiring to the wiring of thedriving circuit, a narrower width of the taken-around wiring isdesigned, compared to the above-mentioned case, and one FPC terminal isconnected with respect to the taken-around wiring. In this way, thenumber of connected FPC terminals is set in consideration of the objectconnected to the taken-around wiring. Furthermore, the protectivecircuit may be provided with respect to each electrode of the lightemitting elements and each wiring of the driving circuit portion.

Then, not shown in the top view of FIG. 7A, resin 713 including aconductor 708 is formed in the opening portion of the second insulatingfilm 711, and connected to FPC 710 through a wiring 709 provided at theFPC side.

As set forth above, in the present embodiment mode, the Cu wiring 702 isprovided at the predetermined position of the taken-around wiring toreduce wiring resistance, and it is possible to prevent heat fromgenerating from the wiring. Especially, in the case of a middle-sized ora large-sized panel, it is necessary to make large current flow.Accordingly, it is useful to use the Cu wiring 702 with low electricresistance as the present embodiment mode since there is an advantagethat large current can be made to flow.

Embodiment Mode 4

The Cu wiring is formed with DC sputtering, RF sputtering, or remoteplasma. In the present embodiment mode, an explanation will be givenwith FIGS. 8 to 10 on how to form the Cu wiring.

FIG. 10 shows a multi-chamber system including a transferring chamber 35in the center, a first deposition chamber 31 for forming a conductivebarrier film, a second deposition chamber 32 for forming a Cu wiring, athird deposition chamber 33 for forming an insulating barrier film, atakeout chamber 34 for taking a substrate out, and a loading chamber 36.The transferring chamber 35 is connected with the respective depositionchamber, the loading chamber, and the takeout chamber respectivelythrough transferring gates 40 a to 40 d. It is noted that reducedpressure is kept in the multi-chamber system at deposition.

With the multi-chamber system as show in FIG. 10, it becomes possible toform the conductive barrier film, the Cu wiring, and the insulatingbarrier film continuously without exposing to the air. When suchcontinuous deposition is performed, it becomes possible to preventimpurities from adhering to the interface and perform favorabledeposition.

FIG. 8 shows an example of a deposition system of the second depositionchamber shown in FIG. 10. The deposition system has a deposition chamber11 provided with a transferring port (takeout port) 22 for taking anobject to be processed (a substrate) out. In the deposition chamber 11,a target of Cu 17 is provided being cooled down with a cooling medium 19(water-cooled) through a backing plate, and circular motion or linearmotion of a permanent magnet 18 in parallel directions to the target(directions indicated by allows in the figure) makes it possible to forma film with a favorable uniformity in a film thickness on a surface ofan opposing substrate. A shutter 23 opens and closes before and afterstarting deposition, and prevents a film from being formed in a statewith unstable plasma at the beginning of discharge.

A substrate holder 27 and a mask holder 28 are moved to set a substrate13 and a mask 14. At this time, the alignment of the substrate and themask may be carried out with a CCD camera 16 provided in the depositionchamber. Further, a magnetic substance (magnet) 15 is provided in asubstrate holding means 12, and keeps the substrate 13 and the mask 14fixed. In order to prevent the substrate in contact with the mask, aspacer may be provided to keep a gap (a height). Besides, a means forholding the target 17 has a means 26 for moving the target up and downto be able to control a distance between the substrate 13 and the target17 at deposition. Of course, a means for moving up and down may beprovided for the substrate holding means 12 to control a distancebetween the substrate 13 and the target 17 at deposition.

In addition, a sheathed heater may be mounted as a heating means intothe substrate holding means 12 and further heated rare gas (Ar gas) maybe introduced from a backside of the substrate to perform heatinguniformly. From a gas introducing means 21, gas such as rare gas andoxygen gas is introduced, and the pressure within the deposition chamber11 is controlled with a conductance valve 25. A current plate 24 isprovided for rectifying a current of sputtering gas. A high-frequencypower source 20 is provided for the target, and high-frequency electricpower is applied to perform sputtering.

When sputtering with the configuration of FIG. 8 is employed, the Cuwiring can be formed with the target of Cu. The deposition of the Cuwiring may be carried out under the condition of heating the substrateat room temperature. In order to further improve adhesiveness to a base,however, it is better to heat also the inside of the deposition chamberat temperatures from 100 to 300° C., preferably, from 150 to 200° C. Atypical frequency of the applied high-frequency electric power is 13.56MHz.

The first and third deposition chambers also have a similarconfiguration to the deposition system shown in FIG. 8. In the case offorming a silicon nitride film, For example, a silicon target is usedand sputtering gas of nitrogen and rare gas is used. Although a typicalfrequency of applied high-frequency electric power is 13.56 MHz, ahigher frequency of 27 to 120 MHz may be used. As the frequency isgetting increased, a chemical reaction becomes to have a priority in amechanism of deposition, and it is expected to form a dense film withless damage to the base. The rare gas used as the sputtering gas mayalso be used as gas for heating the substrate, and the rare gas may beintroduced from the backside of the substrate as shown in FIG. 8.

In the case of forming a TiN film for the conductive barrier film,deposition may be carried out at output power of 150 W, using sputteringgas of nitrogen and argon. Thus formed TiN film has a polycrystallinestructure, and the function of preventing diffusion is enhanced due toan existence of grain boundaries. It is noted that it is possible toform a dense film to improve the property as a barrier when sputteringis performed under conditions of larger output power, an increased flowrate of argon, and a higher temperature of the substrate.

FIG. 9 shows an example of the mask 14 used for the deposition of the Cawiring, dotted lines indicate an arrangement of scan line drivingcircuits 811 a and 811 b, a signal line driving circuit 812, and a pixelportion 813. It is a mask 800 in the case of forming the Cu wiring overa taken-around wiring, a signal line, and source and drain electrodes ofa buffer TFT provided in the signal line driving circuit 812 that FIG. 9shows. Accordingly, the mask 800 has a slit 801 for the taken-aroundwiring, a slit 802 for the signal line, and a slit 803 for the sourceand drain electrodes formed. It is noted that the slits of the mask 800has a width of 5 μm or more, and the width may appropriately be set fora Cu wiring with a narrow width of 5 to 20 μm provided for the signalline in the pixel portion and a Cu wiring with a broad width of 150 to1000 μm provided for the taken-around wiring. Additionally, It ispreferable that a section of the slit has a taper shape toward thesubstrate in order to improve accuracy of deposition.

It is noted that the mask 800 has, for reinforcing, an auxiliary wiring804 provided in a direction perpendicular to the slit. In order not tobecome a barrier at deposition, the auxiliary wiring 804 may have awidth and a length appropriately set and may be arranged appropriately.At deposition of the Cu wiring, the auxiliary wiring 804 is fixed not toface the substrate, that is, at the opposite surface of the mask to thesurface facing the substrate. With such auxiliary wiring, it is possibleto prevent a wiring to be formed from varying in width and meandering.The mask described above is formed of nickel, platinum, copper,stainless, or quartz glass. In particular, a mask formed of a metalmaterial is called a metal mask. Besides, it is preferred that the maskis formed to have a thickness on the order of 5 to 25 μm although thethickness depends on a width of a wiring to be formed.

With the deposition method as set forth above, the Cu wiring can beformed. Then, it is possible to reduce wiring resistance and manufacturea display device with less heating.

Embodiment Mode 5

Electronic devices, each using a display device according to the presentinvention, include a video camera, a digital camera, a goggles-typedisplay (head mount display), a navigation system, a sound reproductiondevice (such as an in-car audio system and an audio set), a lap-topcomputer, a game machine, a portable information terminal (such as amobile computer, a cellular phone, a portable game machine, and anelectronic book), an image reproduction device including a recordingmedium (more specifically, an device which can reproduce a recordingmedium such as a digital versatile disc (DVD) and display the reproducedimage), and the like. In particular, it is preferable that the Cu wiringaccording to the present invention is used for an electronic device witha large-sized screen such as a large-sized television. FIGS. 12A to 12Cshow specific examples of such electronic devices.

FIG. 12A illustrates a large-sized display device which includes acasing 2001, a support table 2002, a display portion 2003, a speakerportion 2004, a video input terminal 2005 and the like. The wiringincluding Cu of the present invention can be used as a wiring and anelectrode provided in the display portion 2003 to complete thelarge-sized display device shown in FIG. 12A according to the presentinvention. It becomes possible to enhance a reduction of voltage dropand a deadened signal in the large-sized display device with a longwiring length when the wiring including Cu is provided to achieve lowerresistance. The display device includes all display devices fordisplaying information, such as a personal computer, a receiver of TVbroadcasting and an advertising display.

FIG. 12B illustrates a lap-top computer which includes a main body 2201,a casing 2202, a display portion 2203, a keyboard 2204, an externalconnection port 2205, a pointing mouse 2206, and the like. The wiringincluding Cu of the present invention can be used as a wiring and anelectrode provided in the display portion 2203 to complete the lap-topcomputer in FIG. 12B according to the present invention.

FIG. 12C illustrates a portable image reproduction device including arecording medium (specifically, a DVD reproduction device), whichincludes a main body 2401, a casing 2402, a display portion A 2403,another display portion B 2404, a recording medium (DVD or the like)reading portion 2405, an operation key 2406, a speaker portion 2407 andthe like. The display portion A 2403 is used mainly for displaying imageinformation, while the display portion B 2404 is used mainly fordisplaying character information. The wiring including Cu of the presentinvention can be used as a wiring and an electrode provided in thedisplay portions A and B 2043 and 2404. The image reproduction deviceincluding the recording medium further includes a home game machine orthe like.

It is noted that the wiring including Cu of the present invention can beused for a front-type or rear-type projector in which light includingoutput image information is enlarged and projected with a lens or thelike.

Further, it is necessary to supply an accurate signal to a lightemitting portion of a light emitting device since the light emittingportion consumes electric power. Accordingly, the wiring including Cu ofthe present invention may be used for the mobile information terminal.

As set forth above, the present invention ran be applied quite widely toelectric apparatus in various fields. Besides, the electric devices inthe present embodiment mode can use any of structures shown inEmbodiment Mode 1 to 4.

As set fourth above, it is possible according to the present inventionto use the wiring including Cu as any of wirings and electrodes such asa signal line, a scan line, a current supply line, a source electrode, adrain electrode, and a gate electrode. With Cu that has low resistanceand makes it possible to flow large current, it is possible to reducevoltage drop and a deadened signal waveform. In particular, it iseffective to use the wiring including Cu of the present invention for amiddle-sized or a large-sized panel. In addition, a display device thathas the wiring including Cu with low resistance can have an area of awiring and an electrode reduced, and it is also possible to achieve anarrowed frame.

Further, in the present invention, sputtering with a mask is employed tobe able to manufacture the Cu wiring with high precision. Accordingly,it is unnecessary to employ complicated processes such as damascene, andit is possible to provide a display device with a low cost and a highyield.

1. A display device comprising: a substrate; a semiconductor layer overthe substrate; a gate electrode; a gate insulating layer interposedbetween the gate electrode and the semiconductor layer; a wiring overthe semiconductor layer; a first insulating layer over the wiring; asecond insulating layer comprising organic material over the firstinsulating layer; a third insulating layer over the second insulatinglayer; and a pixel electrode over the third insulating layer, whereinthe wiring comprises a first layer comprising titanium and a secondlayer comprising copper, wherein the second layer is over the firstlayer, wherein the second layer is narrower than the first layer, andwherein a portion of a bottom surface of the first layer is in contactwith the semiconductor layer.
 2. The display device according to claim1, wherein the first insulating layer comprises a silicon nitride filmor a silicon oxynitride film.
 3. The display device according to claim1, wherein the organic material is any one of polyimide, acrylic,polyamide, and polyimideamide.
 4. The display device according to claim1, wherein the third insulating layer comprises a silicon nitride filmor a silicon oxynitride film.
 5. The display device according to claim1, wherein the first layer comprises a conductive film comprisingtitanium and a conductive barrier film comprising titanium nitride. 6.The display device according to claim 1, wherein the gate electrode isover the gate insulating layer.
 7. A display device comprising: asubstrate; a semiconductor layer over the substrate; a gate electrode; agate insulating layer interposed between the gate electrode and thesemiconductor layer; a wiring over the semiconductor layer; a firstinsulating layer over the wiring; a second insulating layer comprisingorganic material over the first insulating layer; a third insulatinglayer over the second insulating layer; and a pixel electrode over thethird insulating layer, wherein the wiring comprises a first layercomprising titanium and a second layer comprising copper, wherein thesecond layer is over the first layer, wherein the second layer isnarrower than the first layer, wherein a portion of a bottom surface ofthe first layer is in contact with the semiconductor layer, and whereina portion of a top surface of the first layer is in contact with thefirst insulating layer.
 8. The display device according to claim 7,wherein the first insulating layer comprises a silicon nitride film or asilicon oxynitride film.
 9. The display device according to claim 7,wherein the organic material is any one of polyimide, acrylic,polyamide, and polyimideamide.
 10. The display device according to claim7, wherein the third insulating layer comprises a silicon nitride filmor a silicon oxynitride film.
 11. The display device according to claim7, wherein the first layer comprises a conductive film comprisingtitanium and a conductive barrier film comprising titanium nitride. 12.The display device according to claim 7, wherein the gate electrode isover the gate insulating layer.
 13. A display device comprising: asubstrate; a semiconductor layer over the substrate; a gate electrode; agate insulating layer interposed between the gate electrode and thesemiconductor layer; a wiring over the semiconductor layer; a firstinsulating layer over the wiring; a second insulating layer comprisingorganic material over the first insulating layer; a third insulatinglayer over the second insulating layer; and a pixel electrode over thethird insulating layer, wherein the wiring comprises a first layercomprising titanium and a second layer comprising copper, wherein thesecond layer is over the first layer, wherein the second layer isnarrower than the first layer, wherein a portion of a bottom surface ofthe first layer is in contact with the semiconductor layer, wherein thegate electrode comprises a third layer comprising titanium and a fourthlayer comprising copper, wherein the fourth layer is over the thirdlayer, and wherein the fourth layer is narrower than the third layer.14. The display device according to claim 13, wherein the firstinsulating layer comprises a silicon nitride film or a siliconoxynitride film.
 15. The display device according to claim 13, whereinthe organic material is any one of polyimide, acrylic, polyamide, andpolyimideamide.
 16. The display device according to claim 13, whereinthe third insulating layer comprises a silicon nitride film or a siliconoxynitride film.
 17. The display device according to claim 13, whereinthe first layer comprises a conductive film comprising titanium and aconductive barrier film comprising titanium nitride.
 18. The displaydevice according to claim 13, wherein the third layer comprises aconductive film comprising titanium and a conductive barrier filmcomprising titanium nitride.
 19. The display device according to claim13, wherein the gate electrode is over the gate insulating layer.
 20. Adisplay device comprising: a substrate; a semiconductor layer over thesubstrate; a gate electrode; a gate insulating layer interposed betweenthe gate electrode and the semiconductor layer; a wiring over thesemiconductor layer; a first insulating layer over the wiring; a secondinsulating layer comprising organic material over the first insulatinglayer; a third insulating layer over the second insulating layer; and apixel electrode over the third insulating layer, wherein the wiringcomprises a first layer comprising titanium and a second layercomprising copper, wherein the second layer is over the first layer,wherein the second layer is narrower than the first layer, wherein aportion of a bottom surface of the first layer is in contact with thesemiconductor layer, wherein a portion of a top surface of the firstlayer is in contact with the first insulating layer, wherein the gateelectrode comprises a third layer comprising titanium and a fourth layercomprising copper, wherein the fourth layer is over the third layer, andwherein the fourth layer is narrower than the third layer.
 21. Thedisplay device according to claim 20, wherein the first insulating layercomprises a silicon nitride film or a silicon oxynitride film.
 22. Thedisplay device according to claim 20, wherein the organic material isany one of polyimide, acrylic, polyamide, and polyimideamide.
 23. Thedisplay device according to claim 20, wherein the third insulating layercomprises a silicon nitride film or a silicon oxynitride film.
 24. Thedisplay device according to claim 20, wherein the first layer comprisesa conductive film comprising titanium and a conductive barrier filmcomprising titanium nitride.
 25. The display device according to claim20, wherein the third layer comprises a conductive film comprisingtitanium and a conductive barrier film comprising titanium nitride. 26.The display device according to claim 20, wherein the gate electrode isover the gate insulating layer.
 27. A display device comprising: asubstrate; a semiconductor layer over the substrate; a gate electrode; agate insulating layer interposed between the gate electrode and thesemiconductor layer; a wiring over the semiconductor layer; a firstinsulating layer over the wiring; and a second insulating layercomprising organic material over the first insulating layer, wherein thewiring comprises a first layer comprising titanium and a second layercomprising copper, wherein the second layer is over the first layer,wherein the second insulating layer comprises a rounded portion in avertical cross-sectional view of the second insulating layer, whereinthe second layer is narrower than the first layer, and wherein a portionof a bottom surface of the first layer is in contact with thesemiconductor layer.
 28. The display device according to claim 27,wherein the first insulating layer comprises a silicon nitride film or asilicon oxynitride film.
 29. The display device according to claim 27,wherein the organic material is any one of polyimide, acrylic,polyamide, and polyimideamide.
 30. The display device according to claim27, wherein the first layer comprises a conductive film comprisingtitanium and a conductive barrier film comprising titanium nitride. 31.The display device according to claim 27, wherein the gate electrode isover the gate insulating layer.
 32. A display device comprising: asubstrate; a semiconductor layer over the substrate; a gate electrode; agate insulating layer interposed between the gate electrode and thesemiconductor layer; a wiring over the semiconductor layer; a firstinsulating layer over the wiring; and a second insulating layercomprising organic material over the first insulating layer, wherein thewiring comprises a first layer comprising titanium and a second layercomprising copper, wherein the second layer is over the first layer,wherein the second insulating layer comprises a rounded portion in avertical cross-sectional view of the second insulating layer, whereinthe second layer is narrower than the first layer, wherein a portion ofa bottom surface of the first layer is in contact with the semiconductorlayer, wherein a portion of a top surface of the first layer is incontact with the first insulating layer.
 33. The display deviceaccording to claim 32, wherein the first insulating layer comprises asilicon nitride film or a silicon oxynitride film.
 34. The displaydevice according to claim 32, wherein the organic material is any one ofpolyimide, acrylic, polyamide, and polyimideamide.
 35. The displaydevice according to claim 32, wherein the first layer comprises aconductive film comprising titanium and a conductive barrier filmcomprising titanium nitride.
 36. The display device according to claim32, wherein the gate electrode is over the gate insulating layer.
 37. Adisplay device comprising: a substrate; a semiconductor layer over thesubstrate; a gate electrode; a gate insulating layer interposed betweenthe gate electrode and the semiconductor layer; a wiring over thesemiconductor layer; a first insulating layer over the wiring; and asecond insulating layer comprising organic material over the firstinsulating layer, wherein the wiring comprises a first layer comprisingtitanium and a second layer comprising copper, wherein the second layeris over the first layer, wherein the second insulating layer comprises arounded portion in a vertical cross-sectional view of the secondinsulating layer, wherein the second layer is narrower than the firstlayer, wherein a portion of a bottom surface of the first layer is incontact with the semiconductor layer, wherein the gate electrodecomprises a third layer comprising titanium and a fourth layercomprising copper, wherein the fourth layer is over the third layer, andwherein the fourth layer is narrower than the third layer.
 38. Thedisplay device according to claim 37, wherein the first insulating layercomprises a silicon nitride film or a silicon oxynitride film.
 39. Thedisplay device according to claim 37, wherein the organic material isany one of polyimide, acrylic, polyamide, and polyimideamide.
 40. Thedisplay device according to claim 37, wherein the first layer comprisesa conductive film comprising titanium and a conductive barrier filmcomprising titanium nitride.
 41. The display device according to claim37, wherein the third layer comprises a conductive film comprisingtitanium and a conductive barrier film comprising titanium nitride. 42.The display device according to claim 37, wherein the gate electrode isover the gate insulating layer.
 43. A display device comprising: asubstrate; a semiconductor layer over the substrate; a gate electrode; agate insulating layer interposed between the gate electrode and thesemiconductor layer; a wiring over the semiconductor layer; a firstinsulating layer over the wiring; and a second insulating layercomprising organic material over the first insulating layer, wherein thewiring comprises a first layer comprising titanium and a second layercomprising copper, wherein the second layer is over the first layer,wherein the second insulating layer comprises a rounded portion in avertical cross-sectional view of the second insulating layer, whereinthe second layer is narrower than the first layer, wherein a portion ofa bottom surface of the first layer is in contact with the semiconductorlayer, wherein a portion of a top surface of the first layer is incontact with the first insulating layer, wherein the gate electrodecomprises a third layer comprising titanium and a fourth layercomprising copper, wherein the fourth layer is over the third layer, andwherein the fourth layer is narrower than the third layer.
 44. Thedisplay device according to claim 43, wherein the first insulating layercomprises a silicon nitride film or a silicon oxynitride film.
 45. Thedisplay device according to claim 43, wherein the organic material isany one of polyimide, acrylic, polyamide, and polyimideamide.
 46. Thedisplay device according to claim 43, wherein the first layer comprisesa conductive film comprising titanium and a conductive barrier filmcomprising titanium nitride.
 47. The display device according to claim43, wherein the third layer comprises a conductive film comprisingtitanium and a conductive barrier film comprising titanium nitride. 48.The display device according to claim 43, wherein the gate electrode isover the gate insulating layer.